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ltc6084/ltc6085 1 60845fa typical application features applications description dual/quad 1.5mhz, rail-to-rail, cmos ampli ers the ltc ? 6084/ltc6085 are dual/quad, low cost, low offset, rail-to-rail input/output, unity-gain stable cmos operational ampli? ers that feature 1pa of input bias current. a 1.5mhz gain bandwidth, and 0.5v/s slew rate, along with the wide supply range and a low 0.75mv offset, make the ltc6084/ltc6085 useful in an extensive variety of ap- plications from data acquisition to medical equipment and consumer electronics. the 110a supply current and the shutdown mode are ideal for signal processing applications which demand performance with minimal power. the ltc6084/ltc6085 have an output stage which swings within 5mv of either supply rail to maximize signal dynamic range in low supply applications. the input common mode range includes the entire supply voltage. these op amps are speci? ed on power supply voltages of 2.5v and 5v from C40c to 125c. the dual ampli? er ltc6084 is available in 8-lead msop and 10-lead dfn packages. the quad ampli? er ltc6085 is available in 16-lead ssop and dfn packages. shock sensor ampli? er n low offset voltage: 750v maximum n low offset drift: 5v/ c maximum n low input bias current: 1pa (typical at 25 c) 40pa ( 85 c) n rail-to-rail inputs and outputs n 2.5v to 5.5v operation voltage n gain bandwidth product: 1.5mhz n cmrr: 70db minimum n psrr: 94db minimum n supply current: 110a per ampli? er n shutdown current: 1.1a per ampli? er n available in 8-lead msop and 10-lead dfn packages (ltc6084) and 16-lead ssop and dfn packages (ltc6085) n portable test equipment n medical equipment n consumer electronics n data acquisition l , lt, ltc and ltm are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. input bias current vs common mode voltage common mode voltage (v) input bias current (pa) 60845 ta01b 10000 1000 100 10 1 0.1 0.01 0 0.5 1 4.5 5 4 1.5 2 2.5 3 3.5 v s = 5v t a = 125c t a = 85c t a = 85c t a = 25c 60845 ta01 3v + C 0.22f 470pf 20m 20m 200k 100k 2k * 100k 3v *shock sensor murata erie pkgs-oomx1 www.murata.com 1/2 ltc6084 v out = 120mv/g 7hz to 5khz downloaded from: http:///
ltc6084/ltc6085 2 60845fa absolute maximum ratings total supply voltage (v + to v C ) ...................................6v input voltage ...................................................... v C to v + input current ........................................................10ma shdna / shdnb voltage ..................................... v C to v + output short-circuit duration (note 2) ............ inde? nite operating temperature range (note 3) ltc6084c/ltc6085c ........................... C40c to 85c ltc6084h/ltc6085h ......................... C40c to 125c (note 1) 12 3 4 outa Cina+ina v C 87 6 5 v + outbCinb +inb top view ms8 package 8-lead plastic msop +? a +? b t jmax = 150c, ja = 200c/w top view dd package 10-lead (3mm 3mm) plastic dfn 10 96 7 8 45 3 2 1 v + outbCinb +inb shdnb outa Cina+ina v C shdna +? a +? b 11 t jmax = 150c, ja = 43c/w exposed pad (pin 11) is v C , must be soldered to pcb gn package 16-lead plastic ssop narrow 12 3 4 5 6 7 8 top view 1615 14 13 12 11 10 9 outa Cina+ina v + +inbCinb outb nc outdCind +ind v C +incCinc outc nc +? +? +? +? a bc d t jmax = 150c, ja = 110c/w 1615 14 13 12 11 10 9 17 12 3 4 5 6 7 8 outdCind +ind v C +incCinc outc nc outa Cina+ina v + +inbCinb outb nc top view dhc package 16-lead (5mm 3mm) plastic dfn +? +? +? +? a bc d t jmax = 150c, ja = 43c/w exposed pad (pin 17) is v C , must be soldered to pcb pin configuration lead free finish tape and reel part marking * package description specified temperature range ltc6084cms8#pbf ltc6084cms8#trpbf ltdng 8-lead plastic msop 0c to 70c ltc6084hms8#pbf ltc6084hms8#trpbf ltdng 8-lead plastic msop C40c to 125c ltc6084cdd#pbf ltc6084cdd#trpbf ldnh 10-lead (3mm 3mm) plastic dfn 0c to 70c ltc6084hdd#pbf ltc6084hdd#trpbf ldnh 10-lead (3mm 3mm) plastic dfn C40c to 125c speci? ed temperature range (note 4) ltc6084c/ltc6085c ............................... 0c to 70c ltc6084h/ltc6085h ........................... C40c to 125 junction temperature ........................................... 150c storage temperature range ................... C65c to 125c lead temperature (soldering, 10 sec) ms8, gn only ................................................... 300c order information downloaded from: http:///
ltc6084/ltc6085 3 60845fa the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. test conditions are v + = 2.5v, v C = 0v, v cm = 0.5v unless otherwise noted. order information c suffix h suffix symbol parameter conditions min typ max min typ max units v os offset voltage (note 5) ltc6084ms8, ltc6085gn ltc6084dd, ltc6085dhc ltc6084ms8, ltc6085gn ltc6084dd, ltc6085dhc ll 300300 750 1100 900 1350 300300 750 11001100 1600 vv v v v os / t input offset voltage drift (note 6) l 25 25 v/ c i b input bias current (notes 5, 7) guaranteed by 5v test l 1 40 1 750 papa i os input offset current(notes 5, 7) guaranteed by 5v test l 0.5 30 0.5 150 papa e n input noise voltage density f = 1khzf = 10khz 3127 3127 nv/ hz nv/ hz input noise voltage 0.1hz to 10hz 3 3 v p-p i n input noise current density (note 8) 0.56 0.56 fa/ hz input common mode range l v C v + v C v + v c in input capacitance differential mode common mode f = 100khz 59 59 pfpf cmrr common mode rejection ratio 0 v cm 2.5v l 6463 80 64 61 80 db db psrr power supply rejection ratio v s = 2.5v to 5.5v l 9491 115 94 89 115 db db v out output voltage, high, (referred to v + ) no loadi source = 1ma i source = 5ma ll l 0.5 39 220 5 85 460 0.5 39 220 10 100 mvmv mv output voltage, low, (referred to v C ) no loadi sink = 1ma i sink = 5ma ll l 0.5 36 200 5 85 460 0.5 36 200 10 100 mvmv mv a vol large-signal voltage gain r load = 10k, 0.4v v out 2.1v l 400200 2000 400 150 2000 v/mv v/mv electrical characteristics lead free finish tape and reel part marking * package description specified temperature range ltc6085cgn#pbf ltc6085cgn#trpbf 6085 16-lead plastic ssop 0c to 70c ltc6085hgn#pbf ltc6085hgn#trpbf 6085 16-lead plastic ssop C40c to 125c ltc6085cdhc#pbf ltc6085cdhc#trpbf 6085 16-lead (5mm 3mm) plastic dfn 0c to 70c ltc6085hdhc#pbf ltc6085hdhc#trpbf 6085 16-lead (5mm 3mm) plastic dfn C40c to 125c consult ltc marketing for parts speci? ed with wider operating temperature ranges. *the temperature grade is identi? ed by a label on the shipping container. consult ltc marketing for information on non-standard lead based ? nish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/ downloaded from: http:///
ltc6084/ltc6085 4 60845fa the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. test conditions are v + = 2.5v, v C = 0v, v cm = 0.5v unless otherwise noted. electrical characteristics c suffix h suffix symbol parameter conditions min typ max min typ max units i sc output short-circuit current source and sink l 7.7 6 12.5 7.7 4.5 12.5 ma ma sr slew rate a v = 1 0.5 0.5 v/s gbw gain bandwidth product (f test = 10khz) r load = 50k, v cm = 1.25v l 0.90.7 1.5 0.9 0.6 1.5 mhz 0 phase margin r l = 10k, c l = 150pf, a v = 1 45 45 deg t s settling time 0.1% v step = 1v, a v = 1 6 6 s i s supply current (per ampli? er) no load l 110 130 140 110 130 145 aa shutdown current (per ampli? er) shutdown, v shdnx 0.5v l 0.2 0.3 0.2 0.5 a v s supply voltage range guaranteed by the psrr test l 2.5 5.5 2.5 5.5 v channel separation f s = 10khz C120 C120 db shutdown logic shdnx high shdnx low 1.8 0.5 1.8 0.5 vv t on turn on time v shdnx = 0.5v to 1.8v 7 7 s t off turn off time v shdnx = 1.8v to 0.5v 1 1 s leakage of shdn pin v shdnx = 0v l 0.2 0.3 0.2 0.5 a the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. test conditions are v + = 5v, v C = 0v, v cm = 0.5v unless otherwise noted. c suffix h suffix symbol parameter conditions min typ max min typ max units v os offset voltage (note 5) ltc6084ms8, ltc6085gn ltc6084dd, ltc6085dhc ltc6084ms8, ltc6085gn ltc6084dd, ltc6085dhc ll 300300 750 1100 900 1350 300300 750 11001100 1600 vv v v v os / t input offset voltage drift (note 6) l 25 25 v/ c i b input bias current (notes 5, 7) l 1 40 1 750 papa i os input offset current(notes 5, 7) l 0.5 30 0.5 150 papa e n input noise voltage density f = 1khzf = 10khz 3127 3127 nv/ hz nv/ hz input noise voltage 0.1hz to 10hz 3 3 v p-p i n input noise current density (note 8) 0.56 0.56 fa/ hz input common mode range l v C v + v C v + v c in input capacitance differential mode common mode f = 100khz 59 59 pfpf downloaded from: http:///
ltc6084/ltc6085 5 60845fa the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. test conditions are v + = 5v, v C = 0v, v cm = 0.5v unless otherwise noted. electrical characteristics c suffix h suffix symbol parameter conditions min typ max min typ max units cmrr common mode rejection ratio 0 v cm 5v l 7068 84 70 66 84 db db psrr power supply rejection ratio v s = 2.5v to 5.5v l 9491 115 94 89 115 db db v out output voltage, high, (referred to v + ) no loadi source = 1ma i source = 5ma ll l 0.5 39 220 5 85 460 0.5 39 220 10 100 mvmv mv output voltage, low, (referred to v C ) no loadi sink = 1ma i sink = 5ma ll l 0.5 36 200 5 85 460 0.5 36 200 10 100 mvmv mv a vol large-signal voltage gain r load = 10k, 0.5v v out 4.5v l 1000 400 5000 1000 300 5000 v/mv v/mv i sc output short-circuit current source and sink l 7.7 6 12.5 7.7 4.5 12.5 ma ma sr slew rate a v = 1 0.5 0.5 v/s gbw gain bandwidth product (f test = 10khz) r load = 50k, v cm = 2.5v l 0.90.7 1.5 0.9 0.6 1.5 mhz 0 phase margin r l = 10k, c l = 150pf, a v = 1 45 45 deg t s settling time 0.1% v step = 1v, a v = 1 5 5 s i s supply current (per ampli? er) no load l 110 130 140 110 130 145 aa shutdown current (per ampli? er) shutdown, v shdnx 1.2v l 1.1 1.8 1.1 2 a v s supply voltage range guaranteed by the psrr test l 2.5 5.5 2.5 5.5 v channel separation f s = 10khz C120 C120 db shutdown logic shdnx high shdnx low 3.5 1.2 3.5 1.2 vv t on turn on time v shdnx = 1.2v to 3.5v 7 7 s t off turn off time v shdnx = 3.5v to 1.2v 1 1 s leakage of shdn pin v shdnx = 0v l 0.5 0.9 0.5 1.2 a note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: a heat sink may be required to keep the junction temperature below the absolute maximum. this depends on the power supply voltage and the total output current. note 3: the ltc6084c/ltc6085c are guaranteed functional over the operating temperature range of C40c to 85c. the ltc6084h/ltc6085h are guaranteed functional over the operating temperature range of C40c to 125c. note 4: the ltc6084c/ltc6085c are guaranteed to meet speci? ed performance from 0c to 70c. the ltc6084c/ltc6085c are designed, characterized and expected to meet speci? ed performance from C40c to 85c but are not tested or qa sampled at these temperatures. the ltc6084h/ltc6085h are guaranteed to meet speci? ed performance from C40c to 125c. note 5: esd (electrostatic discharge) sensitive device. esd protection devices are used extensively internal to the ltc6084/ltc6085; however, high electrostatic discharge can damage or degrade the device. use proper esd handling precautions. note 6: this parameter is not 100% tested. note 7: this speci? cation is limited by high speed automated test capability. see typical performance characteristic curves for actual performance. note 8: current noise is calculated from i n = 2qi b , where q = 1.6 ? 10 C19 coulombs. downloaded from: http:///
ltc6084/ltc6085 6 60845fa typical performance characteristics v os distribution v os vs v cm v os drift distribution input bias vs temperature input bias current vs common mode voltage input noise voltage vs frequency 0.1hz to 10hz output voltage noise input noise current vs frequency output saturation voltage vs load current (output high) v os (mv) C1 percentage of units (%) 2018 14 10 62 1612 84 0 C0.4 0.4 C0.8 0 0.8 60845 g01 1 C0.6 0.2 C0.2 0.6 ltc6084 ms8 v s = 5v v cm = 0.5v t a = 25c 100 units v cm (v) 0 v os (mv) 1.00.8 0.4 0.0 C0.4C0.8 0.60.2 C0.2C0.6 C1.0 1.5 3.5 0.5 2.5 4.5 60845 g02 5 13 24 v s = 5v t a = 25c representative parts distribution (v/c) C1 percent of units (%) 3018 20 22 2414 10 62 1612 84 0 0.5 2.5 C0.5 1.5 3.5 60845 g03 4.5 02 13 4 ltc6084 ms8 v s = 5v v cm = 2.5v t a = C40c to 125c 78 units 2826 temperature (c) input bias current (pa) 60845 g04 1000 100 10 1 25 115 130 100 85 70 55 40 v s = 5v v cm = 2.5v common mode voltage (v) input bias current (pa) 60845 g05 10000 1000 100 10 1 0.1 0.01 0 0.5 1 4.5 5 4 1.5 2 2.5 3 3.5 v s = 5v t a = 125c t a = 85c t a = 85c t a = 25c frequency (hz) input noise voltage (nv/ hz ) 60845 g06 100 9080 70 60 50 40 20 3010 0 10 10k 100k 1k 100 v s = 5v v cm = 2.5v t a = 25c time (1s/div) input noise voltage (2v/div) 60845 g07 v s = 5v v cm = 2.5v frequency (hz) noise current (fa/ hz ) 60845 g08 600500 400 200 300100 0 1 10 10k 100k 1k 100 load current (ma) output high saturation voltage (v) 60845 g09 5.01.0 1.5 2.0 2.5 3.0 3.5 4.0 4.50.5 0.0 0.1 10 100 1 v s = 5v v cm = 2.5v source sink t a = C55c t a = 25c t a = 125c downloaded from: http:///
ltc6084/ltc6085 7 60845fa typical performance characteristics supply current vs supply voltage supply current vs temperature open-loop gain vs frequency cmrr vs frequency output impedance vs frequency disabled output impedance vs frequency total supply voltage (v) 0 supply current (a) 140100 6020 120 8040 0 1.5 3.5 0.5 2.5 4.5 60845 g10 5 13 24 per amplifier v cm = 0.5v t a = 25c temperature (c) C55 supply current (a) 140120 100 130110 90 C10 50 C40 20 110 60845 g11 125 C25 35 56 5 8 0 9 5 per amplifierv cm = 0.5v v s = 5v v s = 2.5v frequency (hz) gain (db) phase (deg) 60845 g12 100 90 C20 C10 2010 0 30 40 50 60 70 80 C30C40 100C20 200 40 60 80C40 1k 1m 10m 100k 10k c l = 5pf r l = 10k v cm = v s /2 t a = 25c phase gain v s = 5v v s = 2.5v frequency (hz) cmrr (db) 60845 g13 120 90 100 2010 0 30 40 50 60 70 80 110C10 1k 1m 10m 100k 10k v s = 5v v cm = 2.5v r l = 1k t a = 25c psrr vs frequency frequency (hz) psrr (db) 60845 g14 100 9020 30 40 50 60 70 8010 0 C10 100 1k 1m 10m 100k 10k v s = 5v v cm = 2.5v t a = 25c frequency (hz) output impedance () 60845 g15 10000 1 10 100 1000 0.1 0.01 0.001 100 1k 1m 10m 100m 100k 10k v s = 5v v cm = 2.5v t a = 25c a v = 10 a v = 1 a v = 2 frequency (hz) output impedance (k) 60845 g16 1000 100 1 10 0.1 100 1k 1m 10m 100k 10k v s = 5v v cm = 1v a v = 1 t a = 25c capacitive load handling capacitive load (pf) overshoot (%) 60845 g17 4020 15 10 5 25 30 35 0 10 100 1000 v s = 5v v cm = 2.5v a v = 1 r s = 50 +C r s c l r s = 10 downloaded from: http:///
ltc6084/ltc6085 8 60845fa typical performance characteristics capacitive load handling channel separation vs frequency total harmonic distortion and noise vs frequency total harmonic distortion and noise vs frequency total harmonic distortion and noise vs output voltage total harmonic distortion and noise vs load resistance capacitive load (pf) overshoot (%) 60845 g18 5020 15 10 5 25 30 35 40 45 0 10 100 1000 10000 v s = 5v v cm = 2.5v a v = C1 r s = 10 r s = 50 +C r s c l 1k 1k frequency (mhz) channel separation (db) 60845 g19 C90 C105 C100C130 C125 C120 C115 C110 C95 C135 0.001 1 10 0.1 0.01 v s = 5v v cm = 2.5v t a = 25c frequency (khz) thd and noise (%) 60845 g20 1 0.1 0.01 0.001 0.01 10 100 1 0.1 v s = 3v v cm = 1.5v r l = 10k a v = 2, v in = 1v p-p a v = C2, v in = 1v p-p a v = 1, v in = 1v p-p a v = 1, v in = 2v p-p frequency (khz) thd and noise (%) 60845 g21 1 0.1 0.01 0.001 0.0001 0.01 10 100 1 0.1 v s = 5v v cm = 2.5v r l = 10k a v = 2, v in = 1v p-p a v = C2, v in = 1v p-p a v = 1, v in = 1v p-p a v = 1, v in = 2v p-p output voltage (v p-p ) thd and noise (%) 60845 g22 10 1 0.1 0.01 0.001 0.0001 01 0.5 1.5 2.5 3.5 4.5 45 3 2 r l = 10k v cm = v s /2 a v = 1 v s = 3v at 20khz v s = 3v at 1khz v s = 5v at 20khz v s = 5v at 1khz load resistance to ground (k) thd and noise (%) 60845 g23 0.1 0.01 0.001 0.0001 0.1 10 100 1 a v = 1 v cm = v s /2 at 1khz v s = 3v, v in = 1v p-p v s = 5v, v in = 2v p-p small signal response small signal response large signal response 2s/div 60845 g24 v s = 5v a v = 1 r l = 100mv/div 2s/div 60845 g25 v s = 5v a v = 1 r l = c l = 220pf 100mv/div 20s/div 60845 g26 v s = 5v a v = 1 r l = 1v/div downloaded from: http:///
ltc6084/ltc6085 9 60845fa typical performance characteristics out: ampli? er output. Cin: inverting input. +in: noninverting input. v + : positive supply. v C : negative supply. shdna : shutdown pin of ampli? er a, active low and only available with the ltc6084dd. an internal current source pulls the pin to v + when ? oating. shdnb : shutdown pin of ampli? er b, active low and only available with the ltc6084dd. an internal current source pulls the pin to v + when ? oating. nc: not internally connected. exposed pad: connected to v C . large signal response large signal response large signal response 20s/div 60845 g27 v s = 5v a v = C1 r l = 1k 1v/div 20s/div 60845 g28 v s = 5v a v = 1 r l = 1v/div 20s/div 60845 g29 v s = 5v a v = C1 r l = 1k 1v/div pin functions downloaded from: http:///
ltc6084/ltc6085 10 60845fa applications information rail-to-rail input the input stage of ltc6084/ltc6085 combines both pmos and nmos differential pairs, extending its input common mode voltage to both positive and negative supply volt- ages. at high input common mode range, nmos pair is on. at low common mode range, the pmos pair is on. the transition happens when the common voltage is between 1.3 and 0.9v below the positive supply. achieving low input bias current the dd and dhc packages are leadless and make contact to the pcb beneath the package. solder ? ux used during the attachment of the part to the pcb can create leakage current paths and can degrade the input bias current per- formance of the part. all inputs are susceptible because the backside paddle is connected to v C internally. as the input voltage or v C changes, a leakage path can be formed and alter the observed input bias current. for lowest bias current use the ltc6084/ltc6085 in the leaded msop/gn package. with ? ne pcb design rules, you can also provide a guard ring around the inputs. for example, in high source impedance applications such as ph probes, photo diodes, strain gauges, etc., the low input bias current of these parts requires a clean board layout to minimize additional leakage current into a high impedance signal node. a mere 100g of pc board resistance between a 5v supply trace and input trace near ground potential adds 50pa of leakage current. this leakage is far greater than the bias current of the operational ampli? er. a guard ring around the high impedance input traces driven by a low impedance source equal to the input voltage prevents such leakage problems. the guard ring should extend as far as necessary to shield the high impedance signal from any and all leakage paths. figure 1 shows the use of a guard ring in a unity-gain con? guration. in this case the guard ring is connected to the output and is shielding the high impedance noninverting input from v C . figure 2 shows the inverting gain con? guration. rail-to-rail output the output stage of the ltc6084/ltc6085 swings within 5mv of the supply rails when driving high impedance loads, in other words when no dc load current is present. see the typical performance characteristics for curves of output swing versus load current. the class ab design of the output stage enables the op amp to supply load cur- rents which are much greater than the quiescent supply current. for example, the room temperature short-circuit current is typically 12.5ma. capacitive load ltc6084/ltc6085 can drive a capacitive load up to 300pf in unity gain. the capacitive load driving capability increases as the ampli? er is used in higher gain con? gurations. a small series resistance between the output and the load further increases the amount of capacitance the ampli? er can drive. figure 1. sample layout. unity-gain con? guration. using guard ring to shield high impedance input from board leakage figure 2. sample layout. inverting gain con? guration. using guard ring to shield high impedance input from board leakage ltc6084 r outin C in + v C leakage current no leakage current guard ring no solder mask over the guard ring 60845 f01 ltc6084 60845 f02 r r outin C in + v C v in gnd downloaded from: http:///
ltc6084/ltc6085 11 60845fa applications information figure 3. inverting ampli? er with muxed output C + 10k 10k10k 10k out ltc6084 (dd package) sel = 5v, out = Cina sel = 0v, out = Cinb 10k 10k shdn a shdn b fairchild nc7sz04 or equivalent 5v a 5v ina 5v 10k 10k 5v 60845 f03 inb sel C + b shdn pins pins 5 and 6 are used for power shutdown of the ltc6084 in the dd package. if they are ? oating, internal current sources pull pins 5 and 6 to v + and the ampli? ers operate normally. in shutdown the ampli? er output is high imped- ance, and each ampli? er draws less than 1a current. this feature allows the part to be used in muxed output applications as shown in figure 3. esd the ltc6084/ltc6085 has reverse-biased esd protection diodes on all inputs and outputs as shown in the simpli- ? ed schematic. if these pins are forced beyond either supply, unlimited current will ? ow through these diodes. if the current is transient and limited to 100ma or less, no damage to the device will occur. the ampli? er input bias current is the leakage current of these esd diodes. this leakage is a function of the tem- perature and common mode voltage of the ampli? er, as shown in the typical performance characteristics. noise in the frequency region above 1khz, the ltc6084/ltc6085 shows good noise voltage performance. in this region, noise can be dominated by the total source resistance of the particular application. speci? cally, these ampli? ers exhibit the noise of a 58k resistor, meaning it is desirable to keep the source and feedback resistance at or below this value, i.e., r s + r g ||r fb 58k. above this total source impedance, the noise voltage is dominated by the resistors. at low frequency, noise current can be estimated from the expression i n = 2qi b , where q = 1.6 ? 10 C19 coulombs. equating 4ktr f and r 2qi b f shows that for a source resistor below 50g the ampli? er noise is dominated by the source resistance. noise current rises with frequency. see the curve input noise current vs frequency in the typical performance characteristics section. downloaded from: http:///
ltc6084/ltc6085 12 60845fa simplified schematic gain selectable ampli? er +C 60845 ta02 a v out sel = 5v, gain = 25 sel = 0v, gain = 5 a, b: ltc6084 in dfn10 fairchild nc7sz04 or equivalent 5v +C b 1k 4.02k shdn a 10k 10k v in 1k 24.3k shdn b 5v sel simpli? ed schematic of the ampli? er typical applications r1 r2 r3 v + v C r4 C + d8 d7 out m8m9 c1c2 60845 ss v + v C d5 d6 C + output control m4 m6 a1a2 m7 m5 i1 v bias m1 m2 m3 Cin v + v C v + v C d3 d4 +in v C m11 m10 1a v + v C d1 d2 shdn bias generation note: shdn is only available in the dfn package i2 downloaded from: http:///
ltc6084/ltc6085 13 60845fa dd package 10-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1699) package description 3.00 0.10 (4 sides) note:1. drawing to be made a jedec package outline m0-229 variation of (weed-2). check the ltc website data sheet for current status of variation assignment 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.38 0.10 bottom view?exposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.115 typ 2.38 0.10 (2 sides) 1 5 10 6 pin 1 top mark (see note 6) 0.200 ref 0.00 ? 0.05 (dd) dfn 1103 0.25 0.05 2.38 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.15 0.05 0.50bsc 0.675 0.05 3.50 0.05 packageoutline 0.25 0.05 0.50 bsc downloaded from: http:///
ltc6084/ltc6085 14 60845fa package description dhc package 16-lead plastic dfn (5mm 3mm) (reference ltc dwg # 05-08-1706) 3.00 0.10 (2 sides) 5.00 0.10 (2 sides) note:1. drawing proposed to be made variation of version (wjed-1) in jedec package outline mo-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom view?exposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.115 typ r = 0.20 typ 4.40 0.10 (2 sides) 1 8 16 9 pin 1 top mark (see note 6) 0.200 ref 0.00 ? 0.05 (dhc16) dfn 1103 0.25 0.05 pin 1notch 0.50 bsc 4.40 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.20 0.05 0.50 bsc 0.65 0.05 3.50 0.05 packageoutline 0.25 0.05 downloaded from: http:///
ltc6084/ltc6085 15 60845fa information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description ms8 package 8-lead plastic msop (reference ltc dwg # 05-08-1660) msop (ms 8 ) 0307 rev f 0.53 0.152 (.021 .006) seating plane note:1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.18 (.007) 0.254 (.010) 1.10 (.043) max 0.22 ? 0.38 (.009 ? .015) typ 0.1016 0.0508 (.004 .002) 0. 86 (.034) ref 0.65 (.0256) bsc 0 ? 6 typ detail ?a? detail ?a? gauge plane 12 3 4 4.90 0.152 (.193 .006) 8 7 6 5 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) 0.52 (.0205) ref 5.23 (.206) min 3.20 ? 3.45 (.126 ? .136) 0. 889 0.127 (.035 .005) recommended solder pad layout 0.42 0.03 8 (.0165 .0015) typ 0.65 (.0256) bsc gn package 16-lead plastic ssop (narrow .150 inch) (reference ltc dwg # 05-08-1641) gn16 (ssop) 0204 12 3 4 5 6 7 8 .229 ? .244 (5.817 ? 6.198) .150 ? .157** (3. 810 ? 3.9 88 ) 16 15 14 13 .18 9 ? .196* (4. 801 ? 4.978) 12 11 10 9 .016 ? .050 (0.406 ? 1.270) .015 .004 (0.3 8 0.10) 45 0 ? 8 typ .007 ? .009 8 (0.178 ? 0.249) .0532 ? .0688 (1.35 ? 1.75) .008 ? .012 (0.203 ? 0.305) typ .004 ? .0098 (0.102 ? 0.249) .0250 (0.635) bsc .009 (0.229) ref .254 min recommended solder pad layout .150 ? .165 .0250 bsc .0165 .0015 .045 .005 *dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side **dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side inches (millimeters) note:1. controlling dimension: inches 2. dimensions are in 3. drawing not to scale downloaded from: http:///
ltc6084/ltc6085 16 60845fa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2008 lt 0209 rev a printed in usa related parts typical application part number description comments ltc6078/ltc6079 dual/quad micropower precision rail-to-rail op amps 25v v os(max) , 0.7v/ c v os drift(max), 1pa i bias(max) ltc6081/ltc6082 dual/quad precision rail-to-rail input/output amps 70v v os(max) , 0.8v/ c v os drift(max), 1pa i bias(max) ltc6087/ltc6088 dual/quad 14mhz rail-to-rail input/output amps 750v v os(max) , 5v/ c v os drift(max), 1pa i bias ltc6240/ltc6241/ ltc6242 single/dual/quad low noise rail-to-rail output op amps 7nv/ hz noise, 0.2pa i bias , 18mhz gain bandwidth ltc6244 dual low noise rail-to-rail output op amps 8nv/ hz noise, 1pa i bias , 50mhz gain bandwidth bipolar analog isolation ampli? er C+ 60845 ta03 v out = v in v cc = 5v, v in = 5v relative to gnda v out = 5v, relative to gndb oc1, oc2: avago technologies hcnr201 www.avagotech.com oc1 C5v +5v v in v cc oc1 v cc 1/2 ltc6084 1m 1% 10pf C+ oc2 oc2 1/2 ltc6084 1m 1% 10pf gnda C+ oc2 oc1 gndb 3pf 1m ltc6240hv 2k 2k bw 40khz, either polarity large signal transition delay 50s small signal dead zone: |v in | 10mv downloaded from: http:///

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